1. Field of the Invention
The present invention relates to a method for changing a program stored in a read-only memory (ROM) for a processor operating in accordance with such a program and also relates to a processor which can eliminate bugs generated in a program stored in a ROM by changing such a program.
2. Description of the Related Art
A program is basically produced by a man. Therefore, it is impossible to prevent bugs from being generated in a program. Since it is impossible to precisely specify the range of the data dealt by a program for processing an image signal or an audio signal, in particular, it is extremly difficult to totally eliminate the possibility of generating bugs even if test debugging is performed with respect to a great deal of data.
Furthermore, since a competition for developing a product of quality has recently become keener, a new program is required to be developed in a very short period of time, and therefore, there is much demand for realizing a short turn around time (TAT). From such a point of view, various programming methods for preventing bugs from being generated or various methods for shortening the TAT even when bugs have been generated have been proposed.
However, under current circumstances, it is extremely difficult to perform one hundred-percent reliable debugging within such a short period of time assigned for development. Therefore, it is also important to develop a method for providing a product, which has been debugged within a short period of time, as a usable product even if bugs have been generated in the product.
A conventional method for eliminating bugs when the bugs are found in a pram stored in a ROM is described, for example, in Japanese Laid-Open Patent Publication No. 62-239234.
In the case where some program bug is found in a program ROM, an address corresponding to the bug is stored in a circuit. If the address of a program to be executed next time accords with the stored address, an interrupt signal is generated to begin interrupt processing. After the debugging process in an interruption routine is completed, a branch to the next address is executed so as to avoid the stored address. The program bugs are eliminated in this manner.
In a processor, an interruption function is a function which is executed for the purpose of making the processor execute some processing having a higher priority order and greater urgency than those of the processing now being executed.
Therefore, there are many processors which regard an interruption enabled state as a special state. For example, there exist a processor in which, once an interruption is enabled, the data or the like which has been processed before the interruption occurs is automatically retained; a processor which disables another interruption during executing interruption processing; a processor having an instruction which can be used only in the interruption state; and the like.
However, now considering again the original intention to eliminate bugs, it would be understood that it is redundant and meaningless to utilize an interruption function for eliminating bugs. That is to say, the processing actually performed is the processing for eliminating bugs, not the processing corresponding to an interruption. In other words, it is not the utilization of a special interruption function but the elimination of bugs that is the object of the processing. Furthermore, in general, when interruption processing is finished, the routine returns to an instruction which has not been executed because of the interruption, that is to say, an instruction which includes the bugs to be eliminated and is intended to be avoided. Therefore, in the case where it is intended to avoid the instruction having the bugs and return to the next instruction, a processor which does not exit from the interruption in a normal manner but can return to the desired instruction in a special manner must be used. There are many processors which cannot return in such a special manner. In addition, there exist a large number of processors which do not even have an interruption function, let alone a special function. In order to install an interruption function in such a processor, a large-scale circuit must be additionally and newly provided for the processor. Furthermore, a circuit for retaining the address to be avoided and the like are also additionally provided for realizing a special return function. Therefore, considering these inconveniences, such a processor turns out to be very inefficient.
As described above, since a conventional method for eliminating bugs utilizes interruption processing, the number of processors to which such a method is applicable is significantly limited. Moreover, such a method adversely requires the provision of additional circuits.